<HTML><HEAD><TITLE>Device Usage Statistics Report</TITLE></HEAD>
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'><H3>Device Usage Page (usage_statistics_webtalk.html)</H3>This HTML page displays the device usage statistics that will be sent to Xilinx.<BR>To see the actual file transmitted to Xilinx, please click <A HREF="./usage_statistics_webtalk.xml">here</A>.<BR><BR><HR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>software_version_and_target_device</B></TD></TR>
<TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>beta</B></TD><TD>FALSE</TD>
  <TD BGCOLOR='#DBE5F1'><B>build_version</B></TD><TD>2258646</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>date_generated</B></TD><TD>Fri Aug 23 15:53:13 2019</TD>
  <TD BGCOLOR='#DBE5F1'><B>os_platform</B></TD><TD>LIN64</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>product_version</B></TD><TD>Vivado v2018.2 (64-bit)</TD>
  <TD BGCOLOR='#DBE5F1'><B>project_id</B></TD><TD>13dcac2da0784fada7848b6ffa9bea45</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>project_iteration</B></TD><TD>4</TD>
  <TD BGCOLOR='#DBE5F1'><B>random_id</B></TD><TD>d69a5bd82c6d5128b33d9a86c3bbf188</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>registration_id</B></TD><TD>d69a5bd82c6d5128b33d9a86c3bbf188</TD>
  <TD BGCOLOR='#DBE5F1'><B>route_design</B></TD><TD>TRUE</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>target_device</B></TD><TD>xczu3eg</TD>
  <TD BGCOLOR='#DBE5F1'><B>target_family</B></TD><TD>zynquplus</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>target_package</B></TD><TD>sbva484</TD>
  <TD BGCOLOR='#DBE5F1'><B>target_speed</B></TD><TD>-1</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>tool_flow</B></TD><TD>Vivado</TD>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>user_environment</B></TD></TR>
<TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>cpu_name</B></TD><TD>Intel(R) Core(TM) i7-8700 CPU @ 3.20GHz</TD>
  <TD BGCOLOR='#DBE5F1'><B>cpu_speed</B></TD><TD>4535.742 MHz</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>os_name</B></TD><TD>Ubuntu</TD>
  <TD BGCOLOR='#DBE5F1'><B>os_release</B></TD><TD>Ubuntu 16.04.3 LTS</TD>
</TR><TR ALIGN='LEFT'>  <TD BGCOLOR='#DBE5F1'><B>system_ram</B></TD><TD>25.000 GB</TD>
  <TD BGCOLOR='#DBE5F1'><B>total_processors</B></TD><TD>1</TD>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='4'><B>vivado_usage</B></TD></TR>
<TR ALIGN='LEFT'>  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>gui_handlers</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>basedialog_cancel=9</TD>
   <TD>basedialog_ok=31</TD>
   <TD>basedialog_yes=10</TD>
   <TD>coretreetablepanel_core_tree_table=7</TD>
</TR><TR ALIGN='LEFT'>   <TD>filesetpanel_file_set_panel_tree=5</TD>
   <TD>flownavigatortreepanel_flow_navigator_tree=25</TD>
   <TD>gettingstartedview_open_project=4</TD>
   <TD>mainmenumgr_checkpoint=10</TD>
</TR><TR ALIGN='LEFT'>   <TD>mainmenumgr_constraints=1</TD>
   <TD>mainmenumgr_design_hubs=4</TD>
   <TD>mainmenumgr_edit=4</TD>
   <TD>mainmenumgr_export=10</TD>
</TR><TR ALIGN='LEFT'>   <TD>mainmenumgr_file=22</TD>
   <TD>mainmenumgr_flow=4</TD>
   <TD>mainmenumgr_help=6</TD>
   <TD>mainmenumgr_import=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>mainmenumgr_ip=10</TD>
   <TD>mainmenumgr_project=10</TD>
   <TD>mainmenumgr_reports=2</TD>
   <TD>mainmenumgr_text_editor=10</TD>
</TR><TR ALIGN='LEFT'>   <TD>mainmenumgr_tools=2</TD>
   <TD>mainmenumgr_view=4</TD>
   <TD>mainmenumgr_window=6</TD>
   <TD>mainwinmenumgr_layout=6</TD>
</TR><TR ALIGN='LEFT'>   <TD>msgtreepanel_message_view_tree=4</TD>
   <TD>netlistschematicview_show_io_ports_in_this_schematic=3</TD>
   <TD>newexporthardwaredialog_include_bitstream=3</TD>
   <TD>pacommandnames_auto_connect_ports=2</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_export_hardware=4</TD>
   <TD>pacommandnames_launch_hardware=5</TD>
   <TD>pacommandnames_license=1</TD>
   <TD>pacommandnames_license_manage=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>pacommandnames_regenerate_layout=1</TD>
   <TD>paviews_code=1</TD>
   <TD>paviews_device=1</TD>
   <TD>paviews_schematic=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>projecttab_reload=2</TD>
   <TD>psspanelclockingpage_tabbed_pane=1</TD>
   <TD>psspanelddrpage_other_options=2</TD>
   <TD>psspanelmainpage_switch_to_advanced_mode=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>psstreetablepanelbuilder_adv_clk_tree=2</TD>
   <TD>psstreetablepanelbuilder_clk_tree=3</TD>
   <TD>psstreetablepanelbuilder_general_tree=21</TD>
   <TD>psstreetablepanelbuilder_mio_tree=23</TD>
</TR><TR ALIGN='LEFT'>   <TD>rsbapplyautomationbar_run_connection_automation=2</TD>
   <TD>saveprojectutils_save=4</TD>
   <TD>selectmenu_highlight=1</TD>
   <TD>signaltablepanel_signal_table=6</TD>
</TR><TR ALIGN='LEFT'>   <TD>systembuilderview_add_ip=2</TD>
   <TD>systembuilderview_expand_collapse=1</TD>
   <TD>systembuilderview_pinning=5</TD>
</TR>  </TABLE>
  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>java_command_handlers</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>autoconnectport=2</TD>
   <TD>customizersbblock=11</TD>
   <TD>editdelete=4</TD>
   <TD>newexporthardware=4</TD>
</TR><TR ALIGN='LEFT'>   <TD>newlaunchhardware=4</TD>
   <TD>openblockdesign=6</TD>
   <TD>openproject=4</TD>
   <TD>regeneratersblayout=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>runbitgen=8</TD>
   <TD>runschematic=3</TD>
   <TD>runsynthesis=3</TD>
   <TD>savedesign=1</TD>
</TR><TR ALIGN='LEFT'>   <TD>showview=3</TD>
   <TD>updateregid=2</TD>
</TR>  </TABLE>
</TR><TR ALIGN='LEFT'>  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>other_data</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>guimode=5</TD>
</TR>  </TABLE>
  <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
   <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>project_data</B></TD></TR>
<TR ALIGN='LEFT'>   <TD>constraintsetcount=1</TD>
   <TD>core_container=false</TD>
   <TD>currentimplrun=impl_1</TD>
   <TD>currentsynthesisrun=synth_1</TD>
</TR><TR ALIGN='LEFT'>   <TD>default_library=xil_defaultlib</TD>
   <TD>designmode=RTL</TD>
   <TD>export_simulation_activehdl=3</TD>
   <TD>export_simulation_ies=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>export_simulation_modelsim=3</TD>
   <TD>export_simulation_questa=3</TD>
   <TD>export_simulation_riviera=3</TD>
   <TD>export_simulation_vcs=3</TD>
</TR><TR ALIGN='LEFT'>   <TD>export_simulation_xsim=3</TD>
   <TD>implstrategy=Vivado Implementation Defaults</TD>
   <TD>launch_simulation_activehdl=0</TD>
   <TD>launch_simulation_ies=0</TD>
</TR><TR ALIGN='LEFT'>   <TD>launch_simulation_modelsim=0</TD>
   <TD>launch_simulation_questa=0</TD>
   <TD>launch_simulation_riviera=0</TD>
   <TD>launch_simulation_vcs=0</TD>
</TR><TR ALIGN='LEFT'>   <TD>launch_simulation_xsim=0</TD>
   <TD>simulator_language=Mixed</TD>
   <TD>srcsetcount=2</TD>
   <TD>synthesisstrategy=Vivado Synthesis Defaults</TD>
</TR><TR ALIGN='LEFT'>   <TD>target_language=Verilog</TD>
   <TD>target_simulator=XSim</TD>
   <TD>totalimplruns=13</TD>
   <TD>totalsynthesisruns=13</TD>
</TR>  </TABLE>
</TR> </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>unisim_transformation</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>post_unisim_transformation</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg_ps=1</TD>
    <TD>bufgce=7</TD>
    <TD>fdre=289</TD>
    <TD>fdse=32</TD>
</TR><TR ALIGN='LEFT'>    <TD>gnd=45</TD>
    <TD>ibufctrl=2</TD>
    <TD>inbuf=2</TD>
    <TD>lut1=333</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut2=72</TD>
    <TD>lut3=8</TD>
    <TD>lut4=48</TD>
    <TD>lut5=24</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut6=8</TD>
    <TD>mmcme4_adv=1</TD>
    <TD>obuf=2</TD>
    <TD>ps8=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>srl16e=8</TD>
    <TD>vcc=53</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>pre_unisim_transformation</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg_ps=1</TD>
    <TD>bufgce=7</TD>
    <TD>fdre=289</TD>
    <TD>fdse=32</TD>
</TR><TR ALIGN='LEFT'>    <TD>gnd=45</TD>
    <TD>ibuf=3</TD>
    <TD>lut1=333</TD>
    <TD>lut2=72</TD>
</TR><TR ALIGN='LEFT'>    <TD>lut3=8</TD>
    <TD>lut4=48</TD>
    <TD>lut5=24</TD>
    <TD>lut6=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>mmcme4_adv=1</TD>
    <TD>obuf=2</TD>
    <TD>ps8=1</TD>
    <TD>srl16e=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc=53</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>ip_statistics</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>IP_Integrator/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bdsource=USER</TD>
    <TD>core_container=NA</TD>
    <TD>da_axi4_cnt=2</TD>
    <TD>da_board_cnt=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>da_clkrst_cnt=7</TD>
    <TD>da_zynq_ultra_ps_e_cnt=1</TD>
    <TD>iptotal=1</TD>
    <TD>maxhierdepth=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>numblks=12</TD>
    <TD>numhdlrefblks=0</TD>
    <TD>numhierblks=0</TD>
    <TD>numhlsblks=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>numnonxlnxblks=0</TD>
    <TD>numpkgbdblks=0</TD>
    <TD>numreposblks=12</TD>
    <TD>numsysgenblks=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>synth_mode=OOC_per_IP</TD>
    <TD>x_iplanguage=VERILOG</TD>
    <TD>x_iplibrary=BlockDiagram</TD>
    <TD>x_ipname=ultra96v2</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipvendor=xilinx.com</TD>
    <TD>x_ipversion=1.00.a</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>xlconcat_v2_1_1_xlconcat/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>core_container=NA</TD>
    <TD>dout_width=1</TD>
    <TD>in0_width=1</TD>
    <TD>in10_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in11_width=1</TD>
    <TD>in12_width=1</TD>
    <TD>in13_width=1</TD>
    <TD>in14_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in15_width=1</TD>
    <TD>in16_width=1</TD>
    <TD>in17_width=1</TD>
    <TD>in18_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in19_width=1</TD>
    <TD>in1_width=1</TD>
    <TD>in20_width=1</TD>
    <TD>in21_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in22_width=1</TD>
    <TD>in23_width=1</TD>
    <TD>in24_width=1</TD>
    <TD>in25_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in26_width=1</TD>
    <TD>in27_width=1</TD>
    <TD>in28_width=1</TD>
    <TD>in29_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in2_width=1</TD>
    <TD>in30_width=1</TD>
    <TD>in31_width=1</TD>
    <TD>in3_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in4_width=1</TD>
    <TD>in5_width=1</TD>
    <TD>in6_width=1</TD>
    <TD>in7_width=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>in8_width=1</TD>
    <TD>in9_width=1</TD>
    <TD>iptotal=2</TD>
    <TD>num_ports=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipcorerevision=1</TD>
    <TD>x_iplanguage=VERILOG</TD>
    <TD>x_iplibrary=ip</TD>
    <TD>x_ipname=xlconcat</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipproduct=Vivado 2018.2</TD>
    <TD>x_ipsimlanguage=MIXED</TD>
    <TD>x_ipvendor=xilinx.com</TD>
    <TD>x_ipversion=2.1</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>zynq_ultra_ps_e_v3_2_1_zynq_ultra_ps_e/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>c_dp_use_audio=0</TD>
    <TD>c_dp_use_video=0</TD>
    <TD>c_emio_gpio_width=1</TD>
    <TD>c_en_emio_trace=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_en_fifo_enet0=0</TD>
    <TD>c_en_fifo_enet1=0</TD>
    <TD>c_en_fifo_enet2=0</TD>
    <TD>c_en_fifo_enet3=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_maxigp0_data_width=128</TD>
    <TD>c_maxigp1_data_width=128</TD>
    <TD>c_maxigp2_data_width=32</TD>
    <TD>c_num_f2p_0_intr_inputs=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_num_f2p_1_intr_inputs=1</TD>
    <TD>c_num_fabric_resets=1</TD>
    <TD>c_pl_clk0_buf=TRUE</TD>
    <TD>c_pl_clk1_buf=FALSE</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_pl_clk2_buf=FALSE</TD>
    <TD>c_pl_clk3_buf=FALSE</TD>
    <TD>c_saxigp0_data_width=128</TD>
    <TD>c_saxigp1_data_width=128</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_saxigp2_data_width=128</TD>
    <TD>c_saxigp3_data_width=128</TD>
    <TD>c_saxigp4_data_width=128</TD>
    <TD>c_saxigp5_data_width=128</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_saxigp6_data_width=128</TD>
    <TD>c_sd0_internal_bus_width=4</TD>
    <TD>c_sd1_internal_bus_width=4</TD>
    <TD>c_trace_data_width=32</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_trace_pipeline_width=8</TD>
    <TD>c_use_debug_test=0</TD>
    <TD>c_use_diff_rw_clk_gp0=0</TD>
    <TD>c_use_diff_rw_clk_gp1=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_use_diff_rw_clk_gp2=0</TD>
    <TD>c_use_diff_rw_clk_gp3=0</TD>
    <TD>c_use_diff_rw_clk_gp4=0</TD>
    <TD>c_use_diff_rw_clk_gp5=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>c_use_diff_rw_clk_gp6=0</TD>
    <TD>core_container=NA</TD>
    <TD>iptotal=1</TD>
    <TD>x_ipcorerevision=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_iplanguage=VERILOG</TD>
    <TD>x_iplibrary=ip</TD>
    <TD>x_ipname=zynq_ultra_ps_e</TD>
    <TD>x_ipproduct=Vivado 2018.2</TD>
</TR><TR ALIGN='LEFT'>    <TD>x_ipsimlanguage=MIXED</TD>
    <TD>x_ipvendor=xilinx.com</TD>
    <TD>x_ipversion=3.2</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>zynq_ultra_ps_e_v3_2_user_configuration/1</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>x_ipversion=3.2</TD>
    <TD>core_container=NA</TD>
    <TD>iptotal=1</TD>
    <TD>psu__acpu0__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__acpu1__power__on=1</TD>
    <TD>psu__acpu2__power__on=1</TD>
    <TD>psu__acpu3__power__on=1</TD>
    <TD>psu__actual__ip=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__can0__grp_clk__enable=0</TD>
    <TD>psu__can0__peripheral__enable=1</TD>
    <TD>psu__can0__peripheral__io=EMIO</TD>
    <TD>psu__can0_loop_can1__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__can1__grp_clk__enable=0</TD>
    <TD>psu__can1__peripheral__enable=0</TD>
    <TD>psu__crf_apb__acpu_ctrl__act_freqmhz=1199.999988</TD>
    <TD>psu__crf_apb__acpu_ctrl__divisor0=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__acpu_ctrl__freqmhz=1200</TD>
    <TD>psu__crf_apb__acpu_ctrl__srcsel=APLL</TD>
    <TD>psu__crf_apb__afi0_ref__enable=0</TD>
    <TD>psu__crf_apb__afi0_ref_ctrl__act_freqmhz=667</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi0_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__afi0_ref_ctrl__freqmhz=667</TD>
    <TD>psu__crf_apb__afi0_ref_ctrl__srcsel=DPLL</TD>
    <TD>psu__crf_apb__afi1_ref__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi1_ref_ctrl__act_freqmhz=667</TD>
    <TD>psu__crf_apb__afi1_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__afi1_ref_ctrl__freqmhz=667</TD>
    <TD>psu__crf_apb__afi1_ref_ctrl__srcsel=DPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi2_ref__enable=0</TD>
    <TD>psu__crf_apb__afi2_ref_ctrl__act_freqmhz=667</TD>
    <TD>psu__crf_apb__afi2_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__afi2_ref_ctrl__freqmhz=667</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi2_ref_ctrl__srcsel=DPLL</TD>
    <TD>psu__crf_apb__afi3_ref__enable=0</TD>
    <TD>psu__crf_apb__afi3_ref_ctrl__act_freqmhz=667</TD>
    <TD>psu__crf_apb__afi3_ref_ctrl__divisor0=2</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi3_ref_ctrl__freqmhz=667</TD>
    <TD>psu__crf_apb__afi3_ref_ctrl__srcsel=DPLL</TD>
    <TD>psu__crf_apb__afi4_ref__enable=0</TD>
    <TD>psu__crf_apb__afi4_ref_ctrl__act_freqmhz=667</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi4_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__afi4_ref_ctrl__freqmhz=667</TD>
    <TD>psu__crf_apb__afi4_ref_ctrl__srcsel=DPLL</TD>
    <TD>psu__crf_apb__afi5_ref__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__afi5_ref_ctrl__act_freqmhz=667</TD>
    <TD>psu__crf_apb__afi5_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__afi5_ref_ctrl__freqmhz=667</TD>
    <TD>psu__crf_apb__afi5_ref_ctrl__srcsel=DPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__apll_ctrl__div2=1</TD>
    <TD>psu__crf_apb__apll_ctrl__fbdiv=72</TD>
    <TD>psu__crf_apb__apll_ctrl__srcsel=PSS_REF_CLK</TD>
    <TD>psu__crf_apb__apll_frac_cfg__enabled=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__apll_to_lpd_ctrl__divisor0=3</TD>
    <TD>psu__crf_apb__apm_ctrl__act_freqmhz=1</TD>
    <TD>psu__crf_apb__apm_ctrl__divisor0=1</TD>
    <TD>psu__crf_apb__apm_ctrl__freqmhz=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dbg_fpd_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crf_apb__dbg_fpd_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__dbg_fpd_ctrl__freqmhz=250</TD>
    <TD>psu__crf_apb__dbg_fpd_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dbg_trace_ctrl__act_freqmhz=250</TD>
    <TD>psu__crf_apb__dbg_trace_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__dbg_trace_ctrl__freqmhz=250</TD>
    <TD>psu__crf_apb__dbg_trace_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dbg_tstmp_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crf_apb__dbg_tstmp_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__dbg_tstmp_ctrl__freqmhz=250</TD>
    <TD>psu__crf_apb__dbg_tstmp_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__ddr_ctrl__act_freqmhz=266.666664</TD>
    <TD>psu__crf_apb__ddr_ctrl__divisor0=4</TD>
    <TD>psu__crf_apb__ddr_ctrl__freqmhz=533</TD>
    <TD>psu__crf_apb__ddr_ctrl__srcsel=DPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dp_audio_ref_ctrl__act_freqmhz=24.576042</TD>
    <TD>psu__crf_apb__dp_audio_ref_ctrl__divisor0=16</TD>
    <TD>psu__crf_apb__dp_audio_ref_ctrl__divisor1=1</TD>
    <TD>psu__crf_apb__dp_audio_ref_ctrl__freqmhz=25</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dp_audio_ref_ctrl__srcsel=RPLL</TD>
    <TD>psu__crf_apb__dp_stc_ref_ctrl__act_freqmhz=26.214445</TD>
    <TD>psu__crf_apb__dp_stc_ref_ctrl__divisor0=15</TD>
    <TD>psu__crf_apb__dp_stc_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dp_stc_ref_ctrl__freqmhz=27</TD>
    <TD>psu__crf_apb__dp_stc_ref_ctrl__srcsel=RPLL</TD>
    <TD>psu__crf_apb__dp_video_ref_ctrl__act_freqmhz=297.029588</TD>
    <TD>psu__crf_apb__dp_video_ref_ctrl__divisor0=4</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dp_video_ref_ctrl__divisor1=1</TD>
    <TD>psu__crf_apb__dp_video_ref_ctrl__freqmhz=300</TD>
    <TD>psu__crf_apb__dp_video_ref_ctrl__srcsel=VPLL</TD>
    <TD>psu__crf_apb__dpdma_ref_ctrl__act_freqmhz=599.999994</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dpdma_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__dpdma_ref_ctrl__freqmhz=600</TD>
    <TD>psu__crf_apb__dpdma_ref_ctrl__srcsel=APLL</TD>
    <TD>psu__crf_apb__dpll_ctrl__div2=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__dpll_ctrl__fbdiv=64</TD>
    <TD>psu__crf_apb__dpll_ctrl__srcsel=PSS_REF_CLK</TD>
    <TD>psu__crf_apb__dpll_frac_cfg__enabled=0</TD>
    <TD>psu__crf_apb__dpll_to_lpd_ctrl__divisor0=3</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__gdma_ref_ctrl__act_freqmhz=599.999994</TD>
    <TD>psu__crf_apb__gdma_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__gdma_ref_ctrl__freqmhz=600</TD>
    <TD>psu__crf_apb__gdma_ref_ctrl__srcsel=APLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__gpu_ref_ctrl__act_freqmhz=499.999995</TD>
    <TD>psu__crf_apb__gpu_ref_ctrl__divisor0=1</TD>
    <TD>psu__crf_apb__gpu_ref_ctrl__freqmhz=600</TD>
    <TD>psu__crf_apb__gpu_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__pcie_ref_ctrl__act_freqmhz=250</TD>
    <TD>psu__crf_apb__pcie_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__pcie_ref_ctrl__freqmhz=250</TD>
    <TD>psu__crf_apb__pcie_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__sata_ref_ctrl__act_freqmhz=250</TD>
    <TD>psu__crf_apb__sata_ref_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__sata_ref_ctrl__freqmhz=250</TD>
    <TD>psu__crf_apb__sata_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__topsw_lsbus_ctrl__act_freqmhz=99.999999</TD>
    <TD>psu__crf_apb__topsw_lsbus_ctrl__divisor0=5</TD>
    <TD>psu__crf_apb__topsw_lsbus_ctrl__freqmhz=100</TD>
    <TD>psu__crf_apb__topsw_lsbus_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__topsw_main_ctrl__act_freqmhz=533.333328</TD>
    <TD>psu__crf_apb__topsw_main_ctrl__divisor0=2</TD>
    <TD>psu__crf_apb__topsw_main_ctrl__freqmhz=533.333</TD>
    <TD>psu__crf_apb__topsw_main_ctrl__srcsel=DPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__vpll_ctrl__div2=1</TD>
    <TD>psu__crf_apb__vpll_ctrl__fbdiv=71</TD>
    <TD>psu__crf_apb__vpll_ctrl__srcsel=PSS_REF_CLK</TD>
    <TD>psu__crf_apb__vpll_frac_cfg__enabled=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crf_apb__vpll_to_lpd_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__adma_ref_ctrl__act_freqmhz=499.999995</TD>
    <TD>psu__crl_apb__adma_ref_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__adma_ref_ctrl__freqmhz=500</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__adma_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__afi6__enable=0</TD>
    <TD>psu__crl_apb__afi6_ref_ctrl__act_freqmhz=500</TD>
    <TD>psu__crl_apb__afi6_ref_ctrl__divisor0=3</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__afi6_ref_ctrl__freqmhz=500</TD>
    <TD>psu__crl_apb__afi6_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__ams_ref_ctrl__act_freqmhz=51.724137</TD>
    <TD>psu__crl_apb__ams_ref_ctrl__divisor0=29</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__ams_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__ams_ref_ctrl__freqmhz=50</TD>
    <TD>psu__crl_apb__ams_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__can0_ref_ctrl__act_freqmhz=99.999999</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__can0_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__can0_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__can0_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__can0_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__can1_ref_ctrl__act_freqmhz=100</TD>
    <TD>psu__crl_apb__can1_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__can1_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__can1_ref_ctrl__freqmhz=100</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__can1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__cpu_r5_ctrl__act_freqmhz=499.999995</TD>
    <TD>psu__crl_apb__cpu_r5_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__cpu_r5_ctrl__freqmhz=500</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__cpu_r5_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__csu_pll_ctrl__act_freqmhz=500</TD>
    <TD>psu__crl_apb__csu_pll_ctrl__divisor0=4</TD>
    <TD>psu__crl_apb__csu_pll_ctrl__freqmhz=400</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__csu_pll_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__dbg_lpd_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crl_apb__dbg_lpd_ctrl__divisor0=6</TD>
    <TD>psu__crl_apb__dbg_lpd_ctrl__freqmhz=250</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__dbg_lpd_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__debug_r5_atclk_ctrl__act_freqmhz=1000</TD>
    <TD>psu__crl_apb__debug_r5_atclk_ctrl__divisor0=6</TD>
    <TD>psu__crl_apb__debug_r5_atclk_ctrl__freqmhz=1000</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__debug_r5_atclk_ctrl__srcsel=RPLL</TD>
    <TD>psu__crl_apb__dll_ref_ctrl__act_freqmhz=1499.999985</TD>
    <TD>psu__crl_apb__dll_ref_ctrl__freqmhz=1500</TD>
    <TD>psu__crl_apb__dll_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem0_ref_ctrl__act_freqmhz=125</TD>
    <TD>psu__crl_apb__gem0_ref_ctrl__divisor0=12</TD>
    <TD>psu__crl_apb__gem0_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__gem0_ref_ctrl__freqmhz=125</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem0_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__gem1_ref_ctrl__act_freqmhz=125</TD>
    <TD>psu__crl_apb__gem1_ref_ctrl__divisor0=12</TD>
    <TD>psu__crl_apb__gem1_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem1_ref_ctrl__freqmhz=125</TD>
    <TD>psu__crl_apb__gem1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__gem2_ref_ctrl__act_freqmhz=125</TD>
    <TD>psu__crl_apb__gem2_ref_ctrl__divisor0=12</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem2_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__gem2_ref_ctrl__freqmhz=125</TD>
    <TD>psu__crl_apb__gem2_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__gem3_ref_ctrl__act_freqmhz=125</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem3_ref_ctrl__divisor0=12</TD>
    <TD>psu__crl_apb__gem3_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__gem3_ref_ctrl__freqmhz=125</TD>
    <TD>psu__crl_apb__gem3_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem_tsu_ref_ctrl__act_freqmhz=250</TD>
    <TD>psu__crl_apb__gem_tsu_ref_ctrl__divisor0=6</TD>
    <TD>psu__crl_apb__gem_tsu_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__gem_tsu_ref_ctrl__freqmhz=250</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__gem_tsu_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__i2c0_ref_ctrl__act_freqmhz=100</TD>
    <TD>psu__crl_apb__i2c0_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__i2c0_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__i2c0_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__i2c0_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__i2c1_ref_ctrl__act_freqmhz=99.999999</TD>
    <TD>psu__crl_apb__i2c1_ref_ctrl__divisor0=15</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__i2c1_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__i2c1_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__i2c1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__iopll_ctrl__div2=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__iopll_ctrl__fbdiv=45</TD>
    <TD>psu__crl_apb__iopll_ctrl__srcsel=PSS_REF_CLK</TD>
    <TD>psu__crl_apb__iopll_frac_cfg__enabled=0</TD>
    <TD>psu__crl_apb__iopll_to_fpd_ctrl__divisor0=3</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__iou_switch_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crl_apb__iou_switch_ctrl__divisor0=6</TD>
    <TD>psu__crl_apb__iou_switch_ctrl__freqmhz=267</TD>
    <TD>psu__crl_apb__iou_switch_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__lpd_lsbus_ctrl__act_freqmhz=99.999999</TD>
    <TD>psu__crl_apb__lpd_lsbus_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__lpd_lsbus_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__lpd_lsbus_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__lpd_switch_ctrl__act_freqmhz=499.999995</TD>
    <TD>psu__crl_apb__lpd_switch_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__lpd_switch_ctrl__freqmhz=500</TD>
    <TD>psu__crl_apb__lpd_switch_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__nand_ref_ctrl__act_freqmhz=100</TD>
    <TD>psu__crl_apb__nand_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__nand_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__nand_ref_ctrl__freqmhz=100</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__nand_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__ocm_main_ctrl__act_freqmhz=500</TD>
    <TD>psu__crl_apb__ocm_main_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__ocm_main_ctrl__freqmhz=500</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__ocm_main_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__pcap_ctrl__act_freqmhz=187.499998</TD>
    <TD>psu__crl_apb__pcap_ctrl__divisor0=8</TD>
    <TD>psu__crl_apb__pcap_ctrl__freqmhz=200</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pcap_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__pl0_ref_ctrl__act_freqmhz=99.999999</TD>
    <TD>psu__crl_apb__pl0_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__pl0_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pl0_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__pl0_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__pl1_ref_ctrl__act_freqmhz=24.999975</TD>
    <TD>psu__crl_apb__pl1_ref_ctrl__divisor0=15</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pl1_ref_ctrl__divisor1=4</TD>
    <TD>psu__crl_apb__pl1_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__pl1_ref_ctrl__srcsel=RPLL</TD>
    <TD>psu__crl_apb__pl2_ref_ctrl__act_freqmhz=299.999700</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pl2_ref_ctrl__divisor0=5</TD>
    <TD>psu__crl_apb__pl2_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__pl2_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__pl2_ref_ctrl__srcsel=RPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pl3_ref_ctrl__act_freqmhz=374.999625</TD>
    <TD>psu__crl_apb__pl3_ref_ctrl__divisor0=4</TD>
    <TD>psu__crl_apb__pl3_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__pl3_ref_ctrl__freqmhz=100</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__pl3_ref_ctrl__srcsel=RPLL</TD>
    <TD>psu__crl_apb__qspi_ref_ctrl__act_freqmhz=300</TD>
    <TD>psu__crl_apb__qspi_ref_ctrl__divisor0=12</TD>
    <TD>psu__crl_apb__qspi_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__qspi_ref_ctrl__freqmhz=300</TD>
    <TD>psu__crl_apb__qspi_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__rpll_ctrl__div2=1</TD>
    <TD>psu__crl_apb__rpll_ctrl__fbdiv=70</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__rpll_ctrl__srcsel=PSS_REF_CLK</TD>
    <TD>psu__crl_apb__rpll_frac_cfg__enabled=1</TD>
    <TD>psu__crl_apb__rpll_to_fpd_ctrl__divisor0=3</TD>
    <TD>psu__crl_apb__sdio0_ref_ctrl__act_freqmhz=187.499998</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__sdio0_ref_ctrl__divisor0=8</TD>
    <TD>psu__crl_apb__sdio0_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__sdio0_ref_ctrl__freqmhz=200</TD>
    <TD>psu__crl_apb__sdio0_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__sdio1_ref_ctrl__act_freqmhz=187.499998</TD>
    <TD>psu__crl_apb__sdio1_ref_ctrl__divisor0=8</TD>
    <TD>psu__crl_apb__sdio1_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__sdio1_ref_ctrl__freqmhz=200</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__sdio1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__spi0_ref_ctrl__act_freqmhz=187.499998</TD>
    <TD>psu__crl_apb__spi0_ref_ctrl__divisor0=8</TD>
    <TD>psu__crl_apb__spi0_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__spi0_ref_ctrl__freqmhz=200</TD>
    <TD>psu__crl_apb__spi0_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__spi1_ref_ctrl__act_freqmhz=187.499998</TD>
    <TD>psu__crl_apb__spi1_ref_ctrl__divisor0=8</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__spi1_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__spi1_ref_ctrl__freqmhz=200</TD>
    <TD>psu__crl_apb__spi1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__timestamp_ref_ctrl__act_freqmhz=99.999999</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__timestamp_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__timestamp_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__timestamp_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__uart0_ref_ctrl__act_freqmhz=99.999999</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__uart0_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__uart0_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__uart0_ref_ctrl__freqmhz=100</TD>
    <TD>psu__crl_apb__uart0_ref_ctrl__srcsel=IOPLL</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__uart1_ref_ctrl__act_freqmhz=99.999999</TD>
    <TD>psu__crl_apb__uart1_ref_ctrl__divisor0=15</TD>
    <TD>psu__crl_apb__uart1_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__uart1_ref_ctrl__freqmhz=100</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__uart1_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__usb0_bus_ref_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crl_apb__usb0_bus_ref_ctrl__divisor0=6</TD>
    <TD>psu__crl_apb__usb0_bus_ref_ctrl__divisor1=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__usb0_bus_ref_ctrl__freqmhz=250</TD>
    <TD>psu__crl_apb__usb0_bus_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__usb1_bus_ref_ctrl__act_freqmhz=249.999998</TD>
    <TD>psu__crl_apb__usb1_bus_ref_ctrl__divisor0=6</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__usb1_bus_ref_ctrl__divisor1=1</TD>
    <TD>psu__crl_apb__usb1_bus_ref_ctrl__freqmhz=250</TD>
    <TD>psu__crl_apb__usb1_bus_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__crl_apb__usb3__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__usb3_dual_ref_ctrl__act_freqmhz=20.000000</TD>
    <TD>psu__crl_apb__usb3_dual_ref_ctrl__divisor0=5</TD>
    <TD>psu__crl_apb__usb3_dual_ref_ctrl__divisor1=15</TD>
    <TD>psu__crl_apb__usb3_dual_ref_ctrl__freqmhz=20</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__crl_apb__usb3_dual_ref_ctrl__srcsel=IOPLL</TD>
    <TD>psu__csu__csu_tamper_0__enable=0</TD>
    <TD>psu__csu__csu_tamper_0__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_10__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_10__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_11__enable=0</TD>
    <TD>psu__csu__csu_tamper_11__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_12__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_12__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_1__enable=0</TD>
    <TD>psu__csu__csu_tamper_1__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_2__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_2__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_3__enable=0</TD>
    <TD>psu__csu__csu_tamper_3__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_4__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_4__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_5__enable=0</TD>
    <TD>psu__csu__csu_tamper_5__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_6__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_6__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_7__enable=0</TD>
    <TD>psu__csu__csu_tamper_7__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_8__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__csu__csu_tamper_8__erase_bbram=0</TD>
    <TD>psu__csu__csu_tamper_9__enable=0</TD>
    <TD>psu__csu__csu_tamper_9__erase_bbram=0</TD>
    <TD>psu__csu__peripheral__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddr_qos_enable=1</TD>
    <TD>psu__ddr_qos_hp0_rdqos=7</TD>
    <TD>psu__ddr_qos_hp0_wrqos=15</TD>
    <TD>psu__ddr_qos_hp1_rdqos=3</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddr_qos_hp1_wrqos=3</TD>
    <TD>psu__ddr_qos_hp2_rdqos=3</TD>
    <TD>psu__ddr_qos_hp2_wrqos=3</TD>
    <TD>psu__ddr_qos_hp3_rdqos=3</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddr_qos_hp3_wrqos=3</TD>
    <TD>psu__ddr_qos_port0_type=Low Latency</TD>
    <TD>psu__ddr_qos_port1_vn1_type=Low Latency</TD>
    <TD>psu__ddr_qos_port1_vn2_type=Best Effort</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddr_qos_port2_vn1_type=Low Latency</TD>
    <TD>psu__ddr_qos_port2_vn2_type=Best Effort</TD>
    <TD>psu__ddr_qos_port3_type=Video Traffic</TD>
    <TD>psu__ddr_qos_port4_type=Best Effort</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddr_qos_port5_type=Best Effort</TD>
    <TD>psu__ddr_qos_rd_hpr_thrshld=0</TD>
    <TD>psu__ddr_qos_rd_lpr_thrshld=16</TD>
    <TD>psu__ddr_qos_wr_thrshld=16</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__al=0</TD>
    <TD>psu__ddrc__bank_addr_count=3</TD>
    <TD>psu__ddrc__bus_width=32 Bit</TD>
    <TD>psu__ddrc__clock_stop_en=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__col_addr_count=10</TD>
    <TD>psu__ddrc__device_capacity=16384 MBits</TD>
    <TD>psu__ddrc__dram_width=32 Bits</TD>
    <TD>psu__ddrc__ecc=Disabled</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__enable=1</TD>
    <TD>psu__ddrc__freq_mhz=1</TD>
    <TD>psu__ddrc__memory_type=LPDDR 4</TD>
    <TD>psu__ddrc__row_addr_count=16</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__speed_bin=LPDDR4_1066</TD>
    <TD>psu__ddrc__t_faw=40.0</TD>
    <TD>psu__ddrc__t_ras_min=42</TD>
    <TD>psu__ddrc__t_rc=63</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__t_rcd=10</TD>
    <TD>psu__ddrc__t_rp=12</TD>
    <TD>psu__ddrc__train_data_eye=1</TD>
    <TD>psu__ddrc__train_read_gate=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ddrc__train_write_level=1</TD>
    <TD>psu__displayport__peripheral__enable=1</TD>
    <TD>psu__dpaux__peripheral__enable=1</TD>
    <TD>psu__dpaux__peripheral__io=MIO 27 .. 30</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__enet0__grp_mdio__enable=0</TD>
    <TD>psu__enet0__peripheral__enable=0</TD>
    <TD>psu__enet1__grp_mdio__enable=0</TD>
    <TD>psu__enet1__peripheral__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__enet2__grp_mdio__enable=0</TD>
    <TD>psu__enet2__peripheral__enable=0</TD>
    <TD>psu__enet3__grp_mdio__enable=0</TD>
    <TD>psu__enet3__peripheral__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ep__ip=0</TD>
    <TD>psu__fp__power__on=1</TD>
    <TD>psu__fpd_slcr__wdt_clk_sel__select=APB</TD>
    <TD>psu__fpga_pl0_enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__fpga_pl1_enable=0</TD>
    <TD>psu__fpga_pl2_enable=0</TD>
    <TD>psu__fpga_pl3_enable=0</TD>
    <TD>psu__gem__tsu__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__gen_ipi_0__master=APU</TD>
    <TD>psu__gen_ipi_10__master=NONE</TD>
    <TD>psu__gen_ipi_1__master=RPU0</TD>
    <TD>psu__gen_ipi_2__master=RPU1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__gen_ipi_3__master=PMU</TD>
    <TD>psu__gen_ipi_4__master=PMU</TD>
    <TD>psu__gen_ipi_5__master=PMU</TD>
    <TD>psu__gen_ipi_6__master=PMU</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__gen_ipi_7__master=NONE</TD>
    <TD>psu__gen_ipi_8__master=NONE</TD>
    <TD>psu__gen_ipi_9__master=NONE</TD>
    <TD>psu__gpio0_mio__io=MIO 0 .. 25</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__gpio0_mio__peripheral__enable=1</TD>
    <TD>psu__gpio1_mio__io=MIO 26 .. 51</TD>
    <TD>psu__gpio1_mio__peripheral__enable=1</TD>
    <TD>psu__gpio2_mio__io=MIO 52 .. 77</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__gpio2_mio__peripheral__enable=1</TD>
    <TD>psu__gpio_emio__peripheral__enable=0</TD>
    <TD>psu__gpu_pp0__power__on=1</TD>
    <TD>psu__gpu_pp1__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__i2c0__grp_int__enable=0</TD>
    <TD>psu__i2c0__peripheral__enable=0</TD>
    <TD>psu__i2c0_loop_i2c1__enable=0</TD>
    <TD>psu__i2c1__grp_int__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__i2c1__peripheral__enable=1</TD>
    <TD>psu__i2c1__peripheral__io=MIO 4 .. 5</TD>
    <TD>psu__iou_slcr__iou_ttc_apb_clk__ttc0_sel=APB</TD>
    <TD>psu__iou_slcr__iou_ttc_apb_clk__ttc1_sel=APB</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__iou_slcr__iou_ttc_apb_clk__ttc2_sel=APB</TD>
    <TD>psu__iou_slcr__iou_ttc_apb_clk__ttc3_sel=APB</TD>
    <TD>psu__iou_slcr__wdt_clk_sel__select=APB</TD>
    <TD>psu__l2_bank0__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__nand__chip_enable__enable=0</TD>
    <TD>psu__nand__data_strobe__enable=0</TD>
    <TD>psu__nand__peripheral__enable=0</TD>
    <TD>psu__nand__ready_busy__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ocm_bank0__power__on=1</TD>
    <TD>psu__ocm_bank1__power__on=1</TD>
    <TD>psu__ocm_bank2__power__on=1</TD>
    <TD>psu__ocm_bank3__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__override__basic_clock=1</TD>
    <TD>psu__pcie__peripheral__enable=0</TD>
    <TD>psu__pjtag__peripheral__enable=0</TD>
    <TD>psu__pl__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__pmu__emio_gpi__enable=0</TD>
    <TD>psu__pmu__emio_gpo__enable=0</TD>
    <TD>psu__pmu__gpi0__enable=1</TD>
    <TD>psu__pmu__gpi0__io=MIO 26</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__pmu__gpi1__enable=0</TD>
    <TD>psu__pmu__gpi2__enable=0</TD>
    <TD>psu__pmu__gpi3__enable=0</TD>
    <TD>psu__pmu__gpi4__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__pmu__gpi5__enable=0</TD>
    <TD>psu__pmu__gpo0__enable=1</TD>
    <TD>psu__pmu__gpo0__io=MIO 32</TD>
    <TD>psu__pmu__gpo1__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__pmu__gpo1__io=MIO 33</TD>
    <TD>psu__pmu__gpo2__enable=1</TD>
    <TD>psu__pmu__gpo2__io=MIO 34</TD>
    <TD>psu__pmu__gpo3__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__pmu__gpo4__enable=0</TD>
    <TD>psu__pmu__gpo5__enable=0</TD>
    <TD>psu__pmu__peripheral__enable=1</TD>
    <TD>psu__protection__ddr_segments=NONE</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__protection__debug=0</TD>
    <TD>psu__protection__fpd_segments=SA:0xFD1A0000 ;SIZE:1280;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD000000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD010000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD020000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD030000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD040000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD050000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD610000 ;SIZE:512;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFD5D0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware</TD>
    <TD>psu__protection__lpd_segments=SA:0xFF980000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF5E0000 ;SIZE:2560;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFFCC0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF180000 ;SIZE:768;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF410000 ;SIZE:640;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFFA70000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware|SA:0xFF9A0000 ;SIZE:64;UNIT:KB ;RegionTZ:Secure ;WrAllowed:Read/Write;subsystemId:PMU Firmware</TD>
    <TD>psu__protection__ocm_segments=NONE</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__protection__presubsystems=NONE</TD>
    <TD>psu__protection__subsystems=PMU Firmware:PMU</TD>
    <TD>psu__qspi__grp_fbclk__enable=0</TD>
    <TD>psu__qspi__peripheral__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__rpu__power__on=1</TD>
    <TD>psu__sata__lane0__enable=0</TD>
    <TD>psu__sata__lane1__enable=0</TD>
    <TD>psu__sata__peripheral__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__sd0__grp_cd__enable=1</TD>
    <TD>psu__sd0__grp_cd__io=MIO 24</TD>
    <TD>psu__sd0__grp_pow__enable=0</TD>
    <TD>psu__sd0__grp_wp__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__sd0__peripheral__enable=1</TD>
    <TD>psu__sd0__peripheral__io=MIO 13 .. 16 21 22</TD>
    <TD>psu__sd0__slot_type=SD 2.0</TD>
    <TD>psu__sd1__grp_cd__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__sd1__grp_pow__enable=0</TD>
    <TD>psu__sd1__grp_wp__enable=0</TD>
    <TD>psu__sd1__peripheral__enable=1</TD>
    <TD>psu__sd1__peripheral__io=MIO 46 .. 51</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__sd1__slot_type=SD 2.0</TD>
    <TD>psu__spi0__grp_ss0__enable=1</TD>
    <TD>psu__spi0__grp_ss0__io=MIO 41</TD>
    <TD>psu__spi0__grp_ss1__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__spi0__grp_ss2__enable=0</TD>
    <TD>psu__spi0__peripheral__enable=1</TD>
    <TD>psu__spi0__peripheral__io=MIO 38 .. 43</TD>
    <TD>psu__spi0_loop_spi1__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__spi1__grp_ss0__enable=1</TD>
    <TD>psu__spi1__grp_ss0__io=MIO 9</TD>
    <TD>psu__spi1__grp_ss1__enable=0</TD>
    <TD>psu__spi1__grp_ss2__enable=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__spi1__peripheral__enable=1</TD>
    <TD>psu__spi1__peripheral__io=MIO 6 .. 11</TD>
    <TD>psu__swdt0__peripheral__enable=1</TD>
    <TD>psu__swdt1__peripheral__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__tcm0a__power__on=1</TD>
    <TD>psu__tcm0b__power__on=1</TD>
    <TD>psu__tcm1a__power__on=1</TD>
    <TD>psu__tcm1b__power__on=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__testscan__peripheral__enable=0</TD>
    <TD>psu__trace__peripheral__enable=0</TD>
    <TD>psu__ttc0__peripheral__enable=1</TD>
    <TD>psu__ttc1__peripheral__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__ttc2__peripheral__enable=1</TD>
    <TD>psu__ttc3__peripheral__enable=1</TD>
    <TD>psu__uart0__baud_rate=115200</TD>
    <TD>psu__uart0__modem__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__uart0__peripheral__enable=1</TD>
    <TD>psu__uart0__peripheral__io=MIO 2 .. 3</TD>
    <TD>psu__uart0_loop_uart1__enable=0</TD>
    <TD>psu__uart1__baud_rate=115200</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__uart1__modem__enable=0</TD>
    <TD>psu__uart1__peripheral__enable=1</TD>
    <TD>psu__uart1__peripheral__io=MIO 0 .. 1</TD>
    <TD>psu__usb0__peripheral__enable=1</TD>
</TR><TR ALIGN='LEFT'>    <TD>psu__usb0__peripheral__io=MIO 52 .. 63</TD>
    <TD>psu__usb1__peripheral__enable=1</TD>
    <TD>psu__usb1__peripheral__io=MIO 64 .. 75</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_drc</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-append=default::[not_specified]</TD>
    <TD>-checks=default::[not_specified]</TD>
    <TD>-fail_on=default::[not_specified]</TD>
    <TD>-force=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-format=default::[not_specified]</TD>
    <TD>-internal=default::[not_specified]</TD>
    <TD>-internal_only=default::[not_specified]</TD>
    <TD>-messages=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-name=default::[not_specified]</TD>
    <TD>-no_waivers=default::[not_specified]</TD>
    <TD>-return_string=default::[not_specified]</TD>
    <TD>-ruledecks=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-upgrade_cw=default::[not_specified]</TD>
    <TD>-waived=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_methodology</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-append=default::[not_specified]</TD>
    <TD>-checks=default::[not_specified]</TD>
    <TD>-fail_on=default::[not_specified]</TD>
    <TD>-force=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-format=default::[not_specified]</TD>
    <TD>-messages=default::[not_specified]</TD>
    <TD>-name=default::[not_specified]</TD>
    <TD>-return_string=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-waived=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_power</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-advisory=default::[not_specified]</TD>
    <TD>-append=default::[not_specified]</TD>
    <TD>-file=[specified]</TD>
    <TD>-format=default::text</TD>
</TR><TR ALIGN='LEFT'>    <TD>-hier=default::power</TD>
    <TD>-l=default::[not_specified]</TD>
    <TD>-name=default::[not_specified]</TD>
    <TD>-no_propagation=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-return_string=default::[not_specified]</TD>
    <TD>-rpx=[specified]</TD>
    <TD>-verbose=default::[not_specified]</TD>
    <TD>-vid=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-xpe=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>airflow=250 (LFM)</TD>
    <TD>ambient_temp=25.0 (C)</TD>
    <TD>bi-dir_toggle=12.500000</TD>
    <TD>bidir_output_enable=1.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>board_layers=12to15 (12 to 15 Layers)</TD>
    <TD>board_selection=medium (10&quot;x10&quot;)</TD>
    <TD>clocks=0.000705</TD>
    <TD>confidence_level_clock_activity=High</TD>
</TR><TR ALIGN='LEFT'>    <TD>confidence_level_design_state=High</TD>
    <TD>confidence_level_device_models=High</TD>
    <TD>confidence_level_internal_activity=High</TD>
    <TD>confidence_level_io_activity=Low</TD>
</TR><TR ALIGN='LEFT'>    <TD>confidence_level_overall=Low</TD>
    <TD>customer=TBD</TD>
    <TD>customer_class=TBD</TD>
    <TD>devstatic=0.315431</TD>
</TR><TR ALIGN='LEFT'>    <TD>die=xczu3eg-sbva484-1-e</TD>
    <TD>dsp_output_toggle=12.500000</TD>
    <TD>dynamic=1.752576</TD>
    <TD>effective_thetaja=2.7</TD>
</TR><TR ALIGN='LEFT'>    <TD>enable_probability=0.990000</TD>
    <TD>family=zynquplus</TD>
    <TD>ff_toggle=12.500000</TD>
    <TD>flow_state=routed</TD>
</TR><TR ALIGN='LEFT'>    <TD>heatsink=medium (Medium Profile)</TD>
    <TD>i/o=0.000403</TD>
    <TD>input_toggle=12.500000</TD>
    <TD>junction_temp=30.7 (C)</TD>
</TR><TR ALIGN='LEFT'>    <TD>logic=0.000000</TD>
    <TD>netlist_net_matched=NA</TD>
    <TD>off-chip_power=0.000000</TD>
    <TD>on-chip_power=2.068007</TD>
</TR><TR ALIGN='LEFT'>    <TD>output_enable=1.000000</TD>
    <TD>output_load=0.000000</TD>
    <TD>output_toggle=12.500000</TD>
    <TD>package=sbva484</TD>
</TR><TR ALIGN='LEFT'>    <TD>pct_clock_constrained=4.930000</TD>
    <TD>pct_inputs_defined=0</TD>
    <TD>platform=lin64</TD>
    <TD>process=typical</TD>
</TR><TR ALIGN='LEFT'>    <TD>ps8=1.751450</TD>
    <TD>ram_enable=50.000000</TD>
    <TD>ram_write=50.000000</TD>
    <TD>read_saif=False</TD>
</TR><TR ALIGN='LEFT'>    <TD>set/reset_probability=0.000000</TD>
    <TD>signal_rate=False</TD>
    <TD>signals=0.000018</TD>
    <TD>simulation_file=None</TD>
</TR><TR ALIGN='LEFT'>    <TD>speedgrade=-1</TD>
    <TD>static_prob=False</TD>
    <TD>temp_grade=extended</TD>
    <TD>thetajb=2.5 (C/W)</TD>
</TR><TR ALIGN='LEFT'>    <TD>thetasa=8.8 (C/W)</TD>
    <TD>toggle_rate=False</TD>
    <TD>user_board_temp=25.0 (C)</TD>
    <TD>user_effective_thetaja=2.7</TD>
</TR><TR ALIGN='LEFT'>    <TD>user_junc_temp=30.7 (C)</TD>
    <TD>user_thetajb=2.5 (C/W)</TD>
    <TD>user_thetasa=8.8 (C/W)</TD>
    <TD>vcc_psadc_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psadc_static_current=0.001500</TD>
    <TD>vcc_psadc_total_current=0.001500</TD>
    <TD>vcc_psadc_voltage=1.800000</TD>
    <TD>vcc_psaux_dynamic_current=0.000002</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psaux_static_current=0.002200</TD>
    <TD>vcc_psaux_total_current=0.002202</TD>
    <TD>vcc_psaux_voltage=1.800000</TD>
    <TD>vcc_psbatt_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psbatt_static_current=0.000000</TD>
    <TD>vcc_psbatt_total_current=0.000000</TD>
    <TD>vcc_psbatt_voltage=1.200000</TD>
    <TD>vcc_psddr_pll_dynamic_current=0.011270</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psddr_pll_static_current=0.001000</TD>
    <TD>vcc_psddr_pll_total_current=0.012270</TD>
    <TD>vcc_psddr_pll_voltage=1.800000</TD>
    <TD>vcc_psintfp_ddr_dynamic_current=0.190207</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psintfp_ddr_static_current=0.004592</TD>
    <TD>vcc_psintfp_ddr_total_current=0.194798</TD>
    <TD>vcc_psintfp_ddr_voltage=0.850000</TD>
    <TD>vcc_psintfp_dynamic_current=0.932217</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psintfp_static_current=0.036747</TD>
    <TD>vcc_psintfp_total_current=0.968964</TD>
    <TD>vcc_psintfp_voltage=0.850000</TD>
    <TD>vcc_psintlp_dynamic_current=0.308762</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_psintlp_static_current=0.007439</TD>
    <TD>vcc_psintlp_total_current=0.316201</TD>
    <TD>vcc_psintlp_voltage=0.850000</TD>
    <TD>vcc_pspll_dynamic_current=0.067786</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcc_pspll_static_current=0.002000</TD>
    <TD>vcc_pspll_total_current=0.069786</TD>
    <TD>vcc_pspll_voltage=1.200000</TD>
    <TD>vccadc_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccadc_static_current=0.008000</TD>
    <TD>vccadc_total_current=0.008000</TD>
    <TD>vccadc_voltage=1.800000</TD>
    <TD>vccaux_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccaux_io_dynamic_current=0.000059</TD>
    <TD>vccaux_io_static_current=0.025377</TD>
    <TD>vccaux_io_total_current=0.025436</TD>
    <TD>vccaux_io_voltage=1.800000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccaux_static_current=0.047573</TD>
    <TD>vccaux_total_current=0.047573</TD>
    <TD>vccaux_voltage=1.800000</TD>
    <TD>vccbram_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccbram_static_current=0.000756</TD>
    <TD>vccbram_total_current=0.000756</TD>
    <TD>vccbram_voltage=0.850000</TD>
    <TD>vccint_dynamic_current=0.000861</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccint_io_dynamic_current=0.000000</TD>
    <TD>vccint_io_static_current=0.027232</TD>
    <TD>vccint_io_total_current=0.027232</TD>
    <TD>vccint_io_voltage=0.850000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vccint_static_current=0.053917</TD>
    <TD>vccint_total_current=0.054777</TD>
    <TD>vccint_voltage=0.850000</TD>
    <TD>vcco10_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco10_static_current=0.000000</TD>
    <TD>vcco10_total_current=0.000000</TD>
    <TD>vcco10_voltage=1.000000</TD>
    <TD>vcco12_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco12_static_current=0.000000</TD>
    <TD>vcco12_total_current=0.000000</TD>
    <TD>vcco12_voltage=1.200000</TD>
    <TD>vcco135_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco135_static_current=0.000000</TD>
    <TD>vcco135_total_current=0.000000</TD>
    <TD>vcco135_voltage=1.350000</TD>
    <TD>vcco15_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco15_static_current=0.000000</TD>
    <TD>vcco15_total_current=0.000000</TD>
    <TD>vcco15_voltage=1.500000</TD>
    <TD>vcco18_dynamic_current=0.000160</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco18_static_current=0.000007</TD>
    <TD>vcco18_total_current=0.000167</TD>
    <TD>vcco18_voltage=1.800000</TD>
    <TD>vcco25_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco25_static_current=0.000000</TD>
    <TD>vcco25_total_current=0.000000</TD>
    <TD>vcco25_voltage=2.500000</TD>
    <TD>vcco33_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco33_static_current=0.000000</TD>
    <TD>vcco33_total_current=0.000000</TD>
    <TD>vcco33_voltage=3.300000</TD>
    <TD>vcco_psddr_504_dynamic_current=0.214773</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco_psddr_504_static_current=0.034000</TD>
    <TD>vcco_psddr_504_total_current=0.248773</TD>
    <TD>vcco_psddr_504_voltage=1.200000</TD>
    <TD>vcco_psio0_500_dynamic_current=0.000533</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco_psio0_500_static_current=0.000600</TD>
    <TD>vcco_psio0_500_total_current=0.001133</TD>
    <TD>vcco_psio0_500_voltage=1.800000</TD>
    <TD>vcco_psio1_501_dynamic_current=0.000356</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco_psio1_501_static_current=0.000600</TD>
    <TD>vcco_psio1_501_total_current=0.000956</TD>
    <TD>vcco_psio1_501_voltage=1.800000</TD>
    <TD>vcco_psio2_502_dynamic_current=0.000267</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco_psio2_502_static_current=0.000600</TD>
    <TD>vcco_psio2_502_total_current=0.000867</TD>
    <TD>vcco_psio2_502_voltage=1.800000</TD>
    <TD>vcco_psio3_503_dynamic_current=0.000000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vcco_psio3_503_static_current=0.000600</TD>
    <TD>vcco_psio3_503_total_current=0.000600</TD>
    <TD>vcco_psio3_503_voltage=1.800000</TD>
    <TD>version=2018.2</TD>
</TR><TR ALIGN='LEFT'>    <TD>vps_mgtravcc_dynamic_current=0.134237</TD>
    <TD>vps_mgtravcc_static_current=0.001000</TD>
    <TD>vps_mgtravcc_total_current=0.135237</TD>
    <TD>vps_mgtravcc_voltage=0.850000</TD>
</TR><TR ALIGN='LEFT'>    <TD>vps_mgtravtt_dynamic_current=0.033000</TD>
    <TD>vps_mgtravtt_static_current=0.001000</TD>
    <TD>vps_mgtravtt_total_current=0.034000</TD>
    <TD>vps_mgtravtt_voltage=1.800000</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>report_utilization</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>io_standard</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>analog=0</TD>
    <TD>analog_se=0</TD>
    <TD>diff_hstl_i=0</TD>
    <TD>diff_hstl_i_12=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_hstl_i_18=0</TD>
    <TD>diff_hstl_i_dci=0</TD>
    <TD>diff_hstl_i_dci_12=0</TD>
    <TD>diff_hstl_i_dci_18=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_hsul_12=0</TD>
    <TD>diff_hsul_12_dci=0</TD>
    <TD>diff_pod10=0</TD>
    <TD>diff_pod10_dci=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_pod12=0</TD>
    <TD>diff_pod12_dci=0</TD>
    <TD>diff_sstl12=0</TD>
    <TD>diff_sstl12_dci=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_sstl135=0</TD>
    <TD>diff_sstl135_dci=0</TD>
    <TD>diff_sstl135_ii=0</TD>
    <TD>diff_sstl15=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_sstl15_dci=0</TD>
    <TD>diff_sstl15_ii=0</TD>
    <TD>diff_sstl18_i=0</TD>
    <TD>diff_sstl18_i_dci=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>diff_sstl18_ii=0</TD>
    <TD>hslvdci_15=0</TD>
    <TD>hslvdci_18=0</TD>
    <TD>hstl_i=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>hstl_i_12=0</TD>
    <TD>hstl_i_18=0</TD>
    <TD>hstl_i_dci=0</TD>
    <TD>hstl_i_dci_12=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>hstl_i_dci_18=0</TD>
    <TD>hsul_12=0</TD>
    <TD>hsul_12_dci=0</TD>
    <TD>lvcmos12=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lvcmos15=0</TD>
    <TD>lvcmos18=1</TD>
    <TD>lvcmos25=0</TD>
    <TD>lvcmos33=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lvdci_15=0</TD>
    <TD>lvdci_18=0</TD>
    <TD>lvds=0</TD>
    <TD>lvds_25=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>lvpecl=0</TD>
    <TD>lvttl=0</TD>
    <TD>mipi_dphy_dci=0</TD>
    <TD>pod10=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>pod10_dci=0</TD>
    <TD>pod12=0</TD>
    <TD>pod12_dci=0</TD>
    <TD>slvs_400_18=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>slvs_400_25=0</TD>
    <TD>sstl12=0</TD>
    <TD>sstl12_dci=0</TD>
    <TD>sstl135=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>sstl135_dci=0</TD>
    <TD>sstl135_ii=0</TD>
    <TD>sstl15=0</TD>
    <TD>sstl15_dci=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>sstl15_ii=0</TD>
    <TD>sstl18_i=0</TD>
    <TD>sstl18_i_dci=0</TD>
    <TD>sstl18_ii=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>sub_lvds=0</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>primitives</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>bufg_ps_functional_category=Clock</TD>
    <TD>bufg_ps_used=1</TD>
    <TD>ibufctrl_functional_category=Others</TD>
    <TD>ibufctrl_used=2</TD>
</TR><TR ALIGN='LEFT'>    <TD>inbuf_functional_category=I/O</TD>
    <TD>inbuf_used=2</TD>
    <TD>obuf_functional_category=I/O</TD>
    <TD>obuf_used=2</TD>
</TR><TR ALIGN='LEFT'>    <TD>ps8_functional_category=Advanced</TD>
    <TD>ps8_used=1</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>router</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>actual_expansions=199090</TD>
    <TD>bogomips=6384</TD>
    <TD>bram18=0</TD>
    <TD>bram36=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>bufg=0</TD>
    <TD>bufr=0</TD>
    <TD>congestion_level=0</TD>
    <TD>ctrls=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>dsp=0</TD>
    <TD>effort=2</TD>
    <TD>estimated_expansions=255744</TD>
    <TD>ff=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>global_clocks=1</TD>
    <TD>high_fanout_nets=1</TD>
    <TD>iob=4</TD>
    <TD>lut=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>movable_instances=14</TD>
    <TD>nets=354</TD>
    <TD>pins=8296</TD>
    <TD>pll=0</TD>
</TR><TR ALIGN='LEFT'>    <TD>router_runtime=0.000000</TD>
    <TD>router_timing_driven=1</TD>
    <TD>threads=8</TD>
    <TD>timing_constraints_exist=1</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
 <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
  <TR ALIGN='CENTER' BGCOLOR='#A7BFDE'><TD COLSPAN='1'><B>synthesis</B></TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>command_line_options</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>-assert=default::[not_specified]</TD>
    <TD>-bufg=default::12</TD>
    <TD>-cascade_dsp=default::auto</TD>
    <TD>-constrset=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-control_set_opt_threshold=default::auto</TD>
    <TD>-directive=default::default</TD>
    <TD>-fanout_limit=default::10000</TD>
    <TD>-flatten_hierarchy=default::rebuilt</TD>
</TR><TR ALIGN='LEFT'>    <TD>-fsm_extraction=default::auto</TD>
    <TD>-gated_clock_conversion=default::off</TD>
    <TD>-generic=default::[not_specified]</TD>
    <TD>-include_dirs=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-keep_equivalent_registers=default::[not_specified]</TD>
    <TD>-max_bram=default::-1</TD>
    <TD>-max_bram_cascade_height=default::-1</TD>
    <TD>-max_dsp=default::-1</TD>
</TR><TR ALIGN='LEFT'>    <TD>-max_uram=default::-1</TD>
    <TD>-max_uram_cascade_height=default::-1</TD>
    <TD>-mode=default::default</TD>
    <TD>-name=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-no_lc=default::[not_specified]</TD>
    <TD>-no_srlextract=default::[not_specified]</TD>
    <TD>-no_timing_driven=default::[not_specified]</TD>
    <TD>-part=xczu3eg-sbva484-1-e</TD>
</TR><TR ALIGN='LEFT'>    <TD>-resource_sharing=default::auto</TD>
    <TD>-retiming=default::[not_specified]</TD>
    <TD>-rtl=default::[not_specified]</TD>
    <TD>-rtl_skip_constraints=default::[not_specified]</TD>
</TR><TR ALIGN='LEFT'>    <TD>-rtl_skip_ip=default::[not_specified]</TD>
    <TD>-seu_protect=default::none</TD>
    <TD>-sfcu=default::[not_specified]</TD>
    <TD>-shreg_min_size=default::3</TD>
</TR><TR ALIGN='LEFT'>    <TD>-top=ultra96v2_wrapper</TD>
    <TD>-verilog_define=default::[not_specified]</TD>
</TR>   </TABLE>
   </TD></TR>
   <TR><TD>
   <TABLE BORDER='1' CELLSPACING='0' WIDTH='100%'>
    <TR ALIGN='CENTER' BGCOLOR='#DBE5F1'><TD COLSPAN='4'><B>usage</B></TD></TR>
<TR ALIGN='LEFT'>    <TD>elapsed=00:00:28s</TD>
    <TD>hls_ip=0</TD>
    <TD>memory_gain=845.055MB</TD>
    <TD>memory_peak=2517.461MB</TD>
</TR>   </TABLE>
   </TD></TR>
  </TABLE><BR>
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